SDR FPGA Engineer

  • Meritus
  • Gloucester, Gloucestershire
  • May 13, 2026
Full time Government

Job Description

FPGA / SDR Engineer

National Security Gloucester or Romsey SC Cleared

We are supporting a growing National Security technology programme seeking FPGA / SDR Engineers to deliver advanced RF, SIGINT, and Software Defined Radio capability into highly secure customer environments.

This is a hands-on engineering role working across FPGA development, embedded systems, and high performance SDR platforms supporting mission critical programmes at the forefront of UK National Security capability.

The environment combines secure communications, RF systems, embedded Linux, and FPGA acceleration technologies across long-term delivery programmes.



Responsibilities

Develop FPGA and firmware solutions using VHDL / Verilog
Support SDR and RF system integration across embedded environments
Contribute to DSP processing chains and real-time signal processing capability
Work closely with systems, software, and hardware teams on secure technical delivery
Support integration and deployment within secure customer environments
Participate in technical design reviews, optimisation, and architecture discussions



Experience Required

Strong FPGA or Firmware engineering background
Experience with VHDL and/or Verilog
Background within defence, National Security, RF, radar, EW, SDR, or embedded systems environments
Experience working within Linux or embedded Linux systems
Understanding of DSP, RF systems, or Software Defined Radio architectures is highly desirable
OpenCPI, GNU Radio, or similar SDR framework experience would be advantageous



Clearance

Due to the nature of the work, candidates must hold existing UK security clearance (SC or DV preferred).



Location

Roles available in Gloucester or Romsey with flexibility depending on programme requirements.



Package

Competitive salary, strong long-term programme security, and the opportunity to work on genuinely cutting-edge National Security technology programmes.